The interrupt requests are meant to be shared between several advanced devices. The breadboard 65C02 computer has only one of those: The 65C22 VIA (versatile interface adapter). First we need to attach a button to the VIA and connect to VIAs IRQ-Out with the CPUs IRQ-In. I'll add a 2nd button and keep the NMI button for now:
2nd interrupt button.
Next we need a new IRQ handler. I'm going to write the the program in expandable way that multiple IRQs can be handled. Resulting in another over engineered software.
;; ; Increment Counter ; .proc Inc_Counter INC Counter ; 16 bit increment BNE Exit INC Counter + 1 Exit: RTS .endproc ;; ; NMI (non-maskable interrupt) handler ; .proc Do_NMI JSR Inc_Counter ; just increment the counter RTI .endproc ;; ; Handle interrupts from VIA ; .proc Do_VIA_IRQ PHA LDA #%00000010 ; Check CA1 interrupt. BIT VIA::IFR BZE Next ; Interrupt wasn't CA1, check next JSR Inc_Counter ; increment the counter BIT VIA::ORA ; Clear CA1 interrupt Next: PLA ; No more interrupt sources to check. RTS .endproc ;; ; IRQ (interrupt request) hander ; .proc Do_IRQ BIT VIA::IFR BPL Next ; Interrupt wasn't from VIA, check next JSR Do_VIA_IRQ Next: RTI ; No more interrupt sources to check. .endproc
I first check if the IRQ originates from the VIA, using the
BIT operation, and if so call a subroutine for VIA IRQs. I use a subroutine as branch commands can only jump 127 addresses forward and as the program get's more complex I would need to change to JMPs instead.
The VIA itself also has several interrupt sources to next I check if the IRQ came from them CA1 line. The
BIT operation can check bit 6 and 7 without the accumulator for bit 1 I need to load the accumulator with the bit I wish to test.
And here the IRQ handler in stunning action.
All wired up and running
This is the last one in the series. Ben Eater went on to creating the worlds worse graphic card. Very interesting watch but too much for me to build.