Rabbit Protocol v3.0: Custom Unary-Modulated Signaling Simulator with OpenMP Acceleration
Hello Hive community!
Today I want to share a passion project and architectural concept I've been working on. It's an experimental data encoding framework and physical/transport layer simulator called Rabbit Protocol.
The Metaphor: Why "Rabbit"?
The project started with a fun architectural idea: what if we place a very lightweight, agile Layer 2 protocol (the "rabbit") directly onto a "free-ride" transport Layer 1 infrastructure?
In this system, the data stream is transformed into an optimized combination of a Value and a Delta (state change), mimicking specialized hardware transmission lines.
Key Architectural Features:
Unary-Modulated Signaling: Raw data nibbles are transformed into dynamic unary bitstreams. On the physical line, these frames are isolated by a High-Impedance state (
WireState::HIGH_Z) acting as a natural delimiter.XOR-Resolving: Instead of utilizing heavy, slow conditional
if-elsebranching on the receiver side, the protocol employs fast bitwise XOR operations to gracefully resolve and match frame indices.Bi-Directional LUT Overdrive: To achieve maximum performance in a software environment, the encoder and decoder use pre-computed flat direct and inverse Look-Up Tables. It removes the bit-by-bit parsing bottleneck.
Multi-Threaded Bus Parsing (OpenMP): The physical structure of the wire (where frames are bounded by
HIGH_Zmarkers) makes it perfectly parallelizable. The receiver slices the wire array across multiple CPU cores for asynchronous decoding.
Performance & PoC Status
This project is currently a Research Proof-of-Concept. In a clean software-simulated environment, it guarantees 100% Bit-Perfect convergence.
On small files, the full transmission and recovery loop takes just a fraction of a millisecond. When scaled up to large data blocks (~86 MB), the dual-stage registers and index-jump LUT tables keep the processing efficient, achieving clean net performance scaling over 4.0+ MB/sec on multi-core systems.
Note: As an experimental concept, it doesn't implement network noise protection (like CRC or ARQ) yet, so it is strictly a simulation for clean channels.
Check out the Code!
I have published the clean, object-oriented C++ implementation complete with a CMake setup. Anyone can clone it, drop in a test binary file, and run the simulator out of the box.
Feel free to check it out, fork it, or leave your thoughts:
What do you think about utilizing unary encoding variations for internal chip-to-chip or FPGA communication buses? Let's discuss in the comments!